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To produce a layout, print circuit board designers will sometimes use electronic design automation (EDA), which not only stores design information, but also facilitates editing the design and also automates repetitive design tasks. Converting the circuit schematic into a net list is the first stage. Conceptually, the net list includes component pins and circuit nodes, a net that each pin connects to. The circuit design engineer is responsible for net list generation, which is then imported into the printed circuit board layout program. Deciding how to position each device is the second stage. Specifying a grid of lettered rows and numbered columns would be the easiest way to position the devices. The computer program will then assign the first pin of each device to a specific grid location. The operated can assist the computer program by specifying which regions of the printed circuit board they want the device to go into. Once this is done, the computer program compiles the device list into a pin list for the printed circuit board by using templates. These templates come from a library of footprints associated with each type of device, which services as a map of a device’s pins along with a pad and drill hole layout for each one. Some computer programs can identify high-current pads in the device library, which are flagged for attention by the printed circuit board designer. This is because high-current pads need to have wider traces, a width which is usually decided on by the design engineer. The net list is then combined with the pin list, merged together by the computer program, and transfers the physical coordinates of the pin list to the net list. Then the net list gets resorted by net name. Other programs can swap the positions of parts and logic gates, optimizing the design and reducing the length of copper runs. They can discover power pins in the devices automatically and generate runs to the nearest power plane or conductor. Then the program routes each net in the signal-pin list and finds any sequence of connections in the layers. Layers are often assigned to vertical and horizontal wires, shielding the circuits from any outside noise. While most net lists will be automatically routed by the computer program, there may still be some nets that need to be routed manually by the printed circuit board designer. Once this is done, the program will put into place a series of strategy subroutines to reduce the production cost of the printed circuit board. The program could remove unneeded vias or drill holes, it could round the edges of conductor runs, widen or move runs apart to keep safe spacing intact, or even adjust larger copper areas so they form nets. The nets and checks reduce pollution and speed production by extending the life of the etching path and by evening out the copper concentration in the etching path. Some systems are able to validate the design for electrical connectivity and clearance by providing design rule checking or rules for printed circuit board manufacturers. They check for assembly and testing, heat flow and many other types of errors. Some auxiliary layers such as silk-screen, solder mask and solder paste stencils are designed. The last stage involves the copper layers being converted to Gerber files, a format of numerical control file for a photoplotter. Rather than having an additional aperture file require a link to each numerically designated aperture with an actual shape, new Gerber files have been created that can embed the aperture information into the Gerber file itself. The hole locations are encoded in drill files and can be sorted to minimize drill-head movement time and bit changes.
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